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Subversion Repositories mod_sim_exp

[/] [mod_sim_exp/] [trunk/] [syn/] [altera/] [log/] [fifo/] - Rev 104

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Last modification

  • Rev 71 2013-03-06 15:27:23 GMT
  • Author: JonasDC
  • Log message:
    added synthesis report for altera and xilinx for the new ram.
    added coregen sources for xilinx for primitive RAM
Path Last modification Log RSS feed
[FOLDER] mod_sim_exp/ 104  4140d 23h JonasDC View Log RSS feed
[NODE][FOLDER] branches/ 68  4309d 04h JonasDC View Log RSS feed
[NODE][FOLDER] tags/ 104  4140d 23h JonasDC View Log RSS feed
[NODE][FOLDER] trunk/ 103  4140d 23h JonasDC View Log RSS feed
[NODE][NODE][FOLDER] bench/ 94  4190d 00h JonasDC View Log RSS feed
[NODE][NODE][FOLDER] doc/ 103  4140d 23h JonasDC View Log RSS feed
[NODE][NODE][FOLDER] rtl/ 97  4176d 04h JonasDC View Log RSS feed
[NODE][NODE][FOLDER] sim/ 101  4141d 03h JonasDC View Log RSS feed
[NODE][NODE][FOLDER] sw/ 102  4140d 23h JonasDC View Log RSS feed
[NODE][NODE][FOLDER] syn/ 94  4190d 00h JonasDC View Log RSS feed
[NODE][NODE][NODE][FOLDER] altera/ 72  4309d 02h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] log/ 71  4309d 02h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FOLDER] fifo/ 71  4309d 02h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][DB-FILE] generic_mes.htm 71  4309d 02h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][DB-FILE] generic_sum.htm 71  4309d 02h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FOLDER] mod_sim_exp_core/ 71  4309d 02h JonasDC View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FOLDER] operand_mem/ 71  4309d 02h JonasDC View Log RSS feed
[NODE][NODE][NODE][FOLDER] xilinx/ 94  4190d 00h JonasDC View Log RSS feed

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