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[/] [openmsp430/] [trunk/] [fpga/] [xilinx_avnet_lx9microbard/] [synthesis/] [xilinx/] [scripts/] - Rev 228

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Last modification

  • Rev 167 2012-12-06 21:04:46 GMT
  • Author: olivier.girard
  • Log message:
    Update LX9 Microboard FPGA example.
    It now includes a dual-core oMSP system with a shared 16kB program memory.
    Each core has its own 2kB data memory and an additional 2kB shared data memory.
Path Last modification Log RSS feed
[FOLDER] openmsp430/ 228  2401d 12h olivier.girard View Log RSS feed
[NODE][FOLDER] branches/ 1  5605d 14h root View Log RSS feed
[NODE][FOLDER] tags/ 1  5605d 14h root View Log RSS feed
[NODE][FOLDER] trunk/ 228  2401d 12h olivier.girard View Log RSS feed
[NODE][NODE][FOLDER] core/ 211  3274d 23h olivier.girard View Log RSS feed
[NODE][NODE][FOLDER] doc/ 226  2554d 11h olivier.girard View Log RSS feed
[NODE][NODE][FOLDER] fpga/ 223  2922d 11h olivier.girard View Log RSS feed
[NODE][NODE][NODE][FOLDER] actel_m1a3pl_dev_kit/ 212  3274d 23h olivier.girard View Log RSS feed
[NODE][NODE][NODE][FOLDER] altera_de0_nano_soc/ 223  2922d 11h olivier.girard View Log RSS feed
[NODE][NODE][NODE][FOLDER] OBSOLETE/ 221  3000d 12h olivier.girard View Log RSS feed
[NODE][NODE][NODE][FOLDER] xilinx_avnet_lx9microbard/ 212  3274d 23h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] bench/ 167  4350d 13h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] doc/ 157  4402d 12h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] rtl/ 212  3274d 23h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] sim/ 212  3274d 23h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] software/ 212  3274d 23h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] synthesis/ 212  3274d 23h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FOLDER] xilinx/ 212  3274d 23h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][FOLDER] bitstreams/ 212  3274d 23h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][FOLDER] scripts/ 167  4350d 13h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][NODE][FILE] ihex2mem.tcl 157  4402d 12h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][NODE][FILE] impact_generate_prom_file.batch 157  4402d 12h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][NODE][FILE] impact_program_fpga.batch 157  4402d 12h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][NODE][FILE] memory.bmm 167  4350d 13h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][NODE][FILE] openMSP430_fpga.prj 167  4350d 13h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][NODE][FILE] openMSP430_fpga.ucf 167  4350d 13h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][NODE][FILE] xst_verilog.opt 157  4402d 12h olivier.girard View Log RSS feed
[NODE][NODE][NODE][FOLDER] xilinx_diligent_s3board/ 212  3274d 23h olivier.girard View Log RSS feed
[NODE][NODE][FOLDER] tools/ 227  2401d 12h olivier.girard View Log RSS feed

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