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https://opencores.org/ocsvn/openrisc/openrisc/trunk
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[/] [openrisc/] [trunk/] [orpsocv2/] [rtl/] [verilog/] [wb_ram_b3/] - Rev 868
Last modification
- Rev 363 2010-09-12 07:57:53 GMT
- Author: julius
- Log message:
- ORPSoC's RTL code fixed to pass linting by Verilator.
ORPSoC's debug interface disabled for now in both RTL and System C top level.
Profiled building of cycle-accurate model now done correctly.