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[/] - Rev 203

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Last modification

  • Rev 203 2020-04-03 21:39:35 GMT
  • Author: jshamlet
  • Log message:
    Removed an extra delay FF from the bitclock rising edge signal for the clock slave configuration to better center the rising edge pulse on the receive signal.
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[FOLDER] open8_urisc/ 203  1705d 10h jshamlet View Log RSS feed

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