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[/] - Rev 50

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  • Rev 50 2012-04-19 17:06:46 GMT
  • Author: leonardoaraujo.santos
  • Log message:
    Adding function to do combinational unsigned division, problem that it would change the clock to 5Mhz :(
    The combinational delay increased a lot

    udivResult := CONV_STD_LOGIC_VECTOR(udivision(unsigned(A),unsigned(B)), 32);
    intermediate_S := udivResult(nBits downto 0);
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[FOLDER] opencpu32/ 50  4581d 05h leonardoaraujo.santos View Log RSS feed

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