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https://opencores.org/ocsvn/uart16550/uart16550/trunk
Subversion Repositories uart16550
[/] - Rev 50
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Last modification
- Rev 50 2001-12-06 14:51:10 GMT
- Author: gorban
- Log message:
- Bug in LSR[0] is fixed.
All WISHBONE signals are now sampled, so another wait-state is introduced on all transfers.