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[/] - Rev 113

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  • Rev 113 2016-07-16 20:19:03 GMT
  • Author: dgisselq
  • Log message:
    Lots of updates, mostly focused on getting the XuLA board and CPU able to pass
    a comprehensive test suite. At this point, everything passes and logic usage
    is down even. Among the few changes includes the "break" bit in the uCC
    register, used to indicate a switch to supervisor mode occurred as a result
    of a user break, and the ability for the supervisor to clear the instruction
    cache.
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