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[/] - Rev 3

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Last modification

  • Rev 3 2015-07-27 14:45:57 GMT
  • Author: dgisselq
  • Log message:
    Rebuilt the pipefetch (instruction fetch/cache module) so that it will
    let go of the bus if the memory unit wants it to execute an instruction.
    Pipefetch will then grab the bus back whtn the memory unit is done, so things
    otherwise continue as they were before.

    Other tweaks were made to try to reduce code complexity.
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[FOLDER] zipcpu/ 3  3411d 22h dgisselq View Log RSS feed

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