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Subversion Repositories aes_highthroughput_lowarea

[/] [aes_highthroughput_lowarea/] [trunk/] [verilog/] - Rev 8

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Last modification

  • Rev 8 2012-03-31 19:24:02 GMT
  • Author: motilito
  • Log message:
    Added core specification document, core top example module and FPGA synthesis project files.
Path Last modification Log RSS feed
[FOLDER] aes_highthroughput_lowarea/ 8  4625d 03h motilito View Log RSS feed
[NODE][FOLDER] branches/ 1  5384d 08h root View Log RSS feed
[NODE][FOLDER] tags/ 1  5384d 08h root View Log RSS feed
[NODE][FOLDER] trunk/ 8  4625d 03h motilito View Log RSS feed
[NODE][NODE][FOLDER] doc/ 8  4625d 03h motilito View Log RSS feed
[NODE][NODE][FOLDER] verilog/ 8  4625d 03h motilito View Log RSS feed
[NODE][NODE][NODE][FOLDER] bench/ 8  4625d 03h motilito View Log RSS feed
[NODE][NODE][NODE][FOLDER] rtl/ 8  4625d 03h motilito View Log RSS feed
[NODE][NODE][NODE][FOLDER] sim/ 8  4625d 03h motilito View Log RSS feed
[NODE][NODE][NODE][FOLDER] syn/ 8  4625d 03h motilito View Log RSS feed

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