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Subversion Repositories aes_highthroughput_lowarea

[/] [aes_highthroughput_lowarea/] [trunk/] [verilog/] [sim/] - Rev 7

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Last modification

  • Rev 7 2011-01-01 21:09:06 GMT
  • Author: motilito
  • Log message:
    Added AES KAT test bench and simulation batch files for Icarus Verilog.
    Note that reset polarity was changed to rising edge (posedge).
Path Last modification Log RSS feed
[FOLDER] aes_highthroughput_lowarea/ 7  5076d 16h motilito View Log RSS feed
[NODE][FOLDER] branches/ 1  5380d 22h root View Log RSS feed
[NODE][FOLDER] tags/ 1  5380d 22h root View Log RSS feed
[NODE][FOLDER] trunk/ 7  5076d 16h motilito View Log RSS feed
[NODE][NODE][FOLDER] verilog/ 7  5076d 16h motilito View Log RSS feed
[NODE][NODE][NODE][FOLDER] bench/ 7  5076d 16h motilito View Log RSS feed
[NODE][NODE][NODE][FOLDER] rtl/ 7  5076d 16h motilito View Log RSS feed
[NODE][NODE][NODE][FOLDER] sim/ 7  5076d 16h motilito View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] icarus/ 7  5076d 16h motilito View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] KAT_AES/ 7  5076d 16h motilito View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] rtl.fl 7  5076d 16h motilito View Log RSS feed

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