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[/] [amber/] [trunk/] [hw/] [vlog/] [system/] - Rev 32

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Last modification

  • Rev 32 2011-05-18 21:52:32 GMT
  • Author: csantifort
  • Log message:
    Added clock cycle counting register to test_module to support dhrystone performance measurement
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[FOLDER] amber/ 32  4923d 09h csantifort View Log RSS feed
[NODE][FOLDER] branches/ 1  5069d 16h root View Log RSS feed
[NODE][FOLDER] tags/ 1  5069d 16h root View Log RSS feed
[NODE][FOLDER] trunk/ 32  4923d 09h csantifort View Log RSS feed
[NODE][NODE][FOLDER] doc/ 26  4976d 17h csantifort View Log RSS feed
[NODE][NODE][FOLDER] hw/ 32  4923d 09h csantifort View Log RSS feed
[NODE][NODE][NODE][FOLDER] fpga/ 23  4980d 16h csantifort View Log RSS feed
[NODE][NODE][NODE][FOLDER] sim/ 29  4938d 09h csantifort View Log RSS feed
[NODE][NODE][NODE][FOLDER] tests/ 20  5005d 15h csantifort View Log RSS feed
[NODE][NODE][NODE][FOLDER] tools/ 29  4938d 09h csantifort View Log RSS feed
[NODE][NODE][NODE][FOLDER] vlog/ 32  4923d 09h csantifort View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] amber23/ 15  5012d 04h csantifort View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] amber25/ 30  4936d 16h csantifort View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] ethmac/ 2  5042d 14h csantifort View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] lib/ 12  5013d 16h csantifort View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] system/ 32  4923d 09h csantifort View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] afifo.v 2  5042d 14h csantifort View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] boot_mem.v 2  5042d 14h csantifort View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] clocks_resets.v 14  5013d 16h csantifort View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] ddr3_afifo.v 2  5042d 14h csantifort View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] interrupt_controller.v 2  5042d 14h csantifort View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] main_mem.v 11  5028d 16h csantifort View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] memory_configuration.v 10  5029d 20h csantifort View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] register_addresses.v 32  4923d 09h csantifort View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] system.v 15  5012d 04h csantifort View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] system_config_defines.v 17  5009d 13h csantifort View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] test_module.v 32  4923d 09h csantifort View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] timer_module.v 2  5042d 14h csantifort View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] uart.v 27  4971d 17h csantifort View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] wb_ddr3_bridge.v 2  5042d 14h csantifort View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] wb_xs6_ddr3_bridge.v 15  5012d 04h csantifort View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] wb_xv6_ddr3_bridge.v 11  5028d 16h csantifort View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] wishbone_arbiter.v 2  5042d 14h csantifort View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] tb/ 27  4971d 17h csantifort View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] xs6_ddr3/ 11  5028d 16h csantifort View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] xv6_ddr3/ 11  5028d 16h csantifort View Log RSS feed
[NODE][NODE][FOLDER] sw/ 32  4923d 09h csantifort View Log RSS feed

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