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[/] [ethmac/] [trunk/] [rtl/] [verilog/] - Rev 321
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Last modification
- Rev 321 2004-04-26 15:26:23 GMT
- Author: igorm
- Log message:
- - Bug connected to the TX_BD_NUM_Wr signal fixed (bug came in with the
previous update of the core.
- TxBDAddress is set to 0 after the TX is enabled in the MODER register.
- RxBDAddress is set to r_TxBDNum<<1 after the RX is enabled in the MODER
register. (thanks to Mathias and Torbjorn)
- Multicast reception was fixed. Thanks to Ulrich Gries