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[/] [light52/] [trunk/] - Rev 26

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  • Rev 26 2013-12-06 21:44:30 GMT
  • Author: ja_rd
  • Log message:
    Changed the VHDL simulation logging code to match the SW simulator.
    The JBC ACC.x instruction is a special case that needs a tiny hack...
    Note this affects only the simulation test bench, not the RTL!
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[FOLDER] light52/ 26  4008d 16h ja_rd View Log RSS feed
[NODE][FOLDER] branches/ 1  4387d 06h root View Log RSS feed
[NODE][FOLDER] tags/ 1  4387d 06h root View Log RSS feed
[NODE][FOLDER] trunk/ 26  4008d 16h ja_rd View Log RSS feed
[NODE][NODE][FOLDER] boards/ 20  4315d 01h ja_rd View Log RSS feed
[NODE][NODE][FOLDER] doc/ 19  4315d 01h ja_rd View Log RSS feed
[NODE][NODE][FOLDER] sim/ 21  4315d 01h ja_rd View Log RSS feed
[NODE][NODE][FOLDER] test/ 25  4008d 17h ja_rd View Log RSS feed
[NODE][NODE][FOLDER] tools/ 22  4299d 20h ja_rd View Log RSS feed
[NODE][NODE][FOLDER] vhdl/ 26  4008d 16h ja_rd View Log RSS feed

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