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[/] [light8080/] [trunk/] [vhdl/] [test/] - Rev 78

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Last modification

  • Rev 78 2012-04-10 19:42:40 GMT
  • Author: ja_rd
  • Log message:
    Fixed a number of errors in the last refactor of the VHDL side of the project:
    - Path errors in the simulation scripts.
    - The reset pin in the C2SB mini-test-bench was not being driven.
    - The main vhdl test bench file was missing entirely.

    All of these errors due to not properly verifying the commit...
Path Last modification Log RSS feed
[FOLDER] light8080/ 78  4562d 04h ja_rd View Log RSS feed
[NODE][FOLDER] branches/ 31  5689d 23h root View Log RSS feed
[NODE][FOLDER] tags/ 31  5689d 23h root View Log RSS feed
[NODE][FOLDER] trunk/ 78  4562d 04h ja_rd View Log RSS feed
[NODE][NODE][FOLDER] c/ 68  4584d 05h motilito View Log RSS feed
[NODE][NODE][FOLDER] doc/ 76  4569d 18h motilito View Log RSS feed
[NODE][NODE][FOLDER] sim/ 78  4562d 04h ja_rd View Log RSS feed
[NODE][NODE][FOLDER] sw/ 78  4562d 04h ja_rd View Log RSS feed
[NODE][NODE][FOLDER] synthesis/ 46  5558d 19h ja_rd View Log RSS feed
[NODE][NODE][FOLDER] tools/ 73  4573d 09h ja_rd View Log RSS feed
[NODE][NODE][FOLDER] ucode/ 64  4620d 13h ja_rd View Log RSS feed
[NODE][NODE][FOLDER] util/ 64  4620d 13h ja_rd View Log RSS feed
[NODE][NODE][FOLDER] verilog/ 68  4584d 05h motilito View Log RSS feed
[NODE][NODE][FOLDER] vhdl/ 78  4562d 04h ja_rd View Log RSS feed
[NODE][NODE][NODE][FOLDER] demo/ 61  4989d 00h ja_rd View Log RSS feed
[NODE][NODE][NODE][FOLDER] soc/ 77  4563d 02h ja_rd View Log RSS feed
[NODE][NODE][NODE][FOLDER] test/ 78  4562d 04h ja_rd View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] light8080_tb.vhdl 78  4562d 04h ja_rd View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] light8080_tb0.vhdl 64  4620d 13h ja_rd View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] light8080_tb1.vhdl 59  5017d 13h ja_rd View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] tb_template.vhdl 59  5017d 13h ja_rd View Log RSS feed
[NODE][FOLDER] web_uploads/ 33  5689d 09h root View Log RSS feed

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