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[/] [minsoc/] [branches/] [rc-1.0/] [sim/] [modelsim/] - Rev 152

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[FOLDER] minsoc/ 152  4749d 15h rfajardo View Log RSS feed
[NODE][FOLDER] branches/ 152  4749d 15h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] rc-1.0/ 152  4749d 15h rfajardo View Log RSS feed
[NODE][NODE][NODE][FOLDER] backend/ 147  4754d 13h rfajardo View Log RSS feed
[NODE][NODE][NODE][FOLDER] bench/ 148  4754d 11h rfajardo View Log RSS feed
[NODE][NODE][NODE][FOLDER] doc/ 101  4817d 18h rfajardo View Log RSS feed
[NODE][NODE][NODE][FOLDER] prj/ 133  4770d 16h rfajardo View Log RSS feed
[NODE][NODE][NODE][FOLDER] rtl/ 110  4782d 04h rfajardo View Log RSS feed
[NODE][NODE][NODE][FOLDER] sim/ 147  4754d 13h rfajardo View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] modelsim/ 134  4770d 14h rfajardo View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] compile_design.bat 121  4781d 06h rfajardo View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] compile_design.sh 104  4789d 15h rfajardo View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] prepare_modelsim.bat 121  4781d 06h rfajardo View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] prepare_modelsim.sh 70  4951d 15h rfajardo View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] run_sim.bat 134  4770d 14h rfajardo View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] run_sim.sh 133  4770d 16h rfajardo View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] results/ 2  5550d 14h rfajardo View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] run/ 147  4754d 13h rfajardo View Log RSS feed
[NODE][NODE][NODE][FOLDER] sw/ 147  4754d 13h rfajardo View Log RSS feed
[NODE][NODE][NODE][FOLDER] syn/ 121  4781d 06h rfajardo View Log RSS feed
[NODE][NODE][NODE][FOLDER] utils/ 152  4749d 15h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] verilator/ 140  4755d 15h rfajardo View Log RSS feed
[NODE][FOLDER] tags/ 151  4749d 15h rfajardo View Log RSS feed
[NODE][FOLDER] trunk/ 149  4749d 15h rfajardo View Log RSS feed

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