URL
https://opencores.org/ocsvn/minsoc/minsoc/trunk
Subversion Repositories minsoc
[/] [minsoc/] [branches/] [verilator/] - Rev 108
Go to most recent revision | Changes | View Log | RSS feed
Last modification
- Rev 108 2011-10-26 16:48:51 GMT
- Author: rfajardo
- Log message:
- Scripts updates to correct paths when working under Windows. Now, ModelSim, Xilinx and Altera synthesis are working on Windows through batch files.
Icarus Verilog and Altera synthesis are working as well. Job done!