OpenCores
URL https://opencores.org/ocsvn/minsoc/minsoc/trunk

Subversion Repositories minsoc

[/] [minsoc/] [trunk/] - Rev 108

Rev

Go to most recent revision | Changes | View Log | RSS feed

Last modification

  • Rev 108 2011-10-26 16:48:51 GMT
  • Author: rfajardo
  • Log message:
    Scripts updates to correct paths when working under Windows. Now, ModelSim, Xilinx and Altera synthesis are working on Windows through batch files.

    Icarus Verilog and Altera synthesis are working as well. Job done!
Path Last modification Log RSS feed
[FOLDER] minsoc/ 108  4782d 05h rfajardo View Log RSS feed
[NODE][FOLDER] branches/ 1  5550d 12h root View Log RSS feed
[NODE][FOLDER] tags/ 42  5007d 07h rfajardo View Log RSS feed
[NODE][FOLDER] trunk/ 108  4782d 05h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] backend/ 105  4782d 13h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] bench/ 71  4951d 11h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] doc/ 101  4817d 14h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] prj/ 108  4782d 05h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] rtl/ 88  4832d 05h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] sim/ 104  4789d 11h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] sw/ 80  4850d 11h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] syn/ 107  4782d 08h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] utils/ 106  4782d 11h rfajardo View Log RSS feed

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.