OpenCores
URL https://opencores.org/ocsvn/minsoc/minsoc/trunk

Subversion Repositories minsoc

[/] [minsoc/] [trunk/] [rtl/] - Rev 60

Rev

Go to most recent revision | Changes | View Log | RSS feed

Last modification

  • Rev 60 2011-04-28 22:44:09 GMT
  • Author: rfajardo
  • Log message:
    Selection of memory model or implementation memory is now made on minsoc_bench_defines.v. It is done by a definition instead of including different files for simulation.

    minsoc_bench_defines.v definition of reset level was not correct. It based the level decision on defineds POSITIVE_RESET or NEGATIVE_RESET, which couldn't be defined by then, since minsoc_defines.v is not included in minsoc_bench_defines.v. The decision has been moved to minsoc_bench.v and made a localparam instead of a definition.
Path Last modification Log RSS feed
[FOLDER] minsoc/ 60  4937d 18h rfajardo View Log RSS feed
[NODE][FOLDER] branches/ 1  5525d 07h root View Log RSS feed
[NODE][FOLDER] tags/ 42  4982d 03h rfajardo View Log RSS feed
[NODE][FOLDER] trunk/ 60  4937d 18h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] backend/ 40  4988d 01h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] bench/ 60  4937d 18h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] doc/ 49  4975d 03h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] rtl/ 60  4937d 18h rfajardo View Log RSS feed
[NODE][NODE][NODE][FOLDER] verilog/ 60  4937d 18h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] sim/ 60  4937d 18h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] sw/ 55  4946d 03h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] utils/ 47  4976d 02h rfajardo View Log RSS feed

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.