Subversion Repositories minsoc

Last modification

• Rev 62 2011-04-29 10:32:37 GMT
• Author: rfajardo

• Log message:

  Wrapping different family modules of same manufacturer in a single module.
  
  minsoc_clock_manager.v: uses fpga manufacturer wrappers
  
  xilinx_dcm.v: selects between different Xilinx FPGA families and implements the module
  
  altera_pll.v: selects between different Altera FPGA families and implements the module