URL https://opencores.org/ocsvn/mod_sim_exp/mod_sim_exp/trunk

Subversion Repositories mod_sim_exp

[/] [mod_sim_exp/] [trunk/] [rtl/] [vhdl/] [core/] - Rev 34

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Last modification

Rev 34 2012-11-07 19:01:11 GMT
Author: JonasDC
Log message:
operand memory now supports custom operand widths, the internal memory stays the fixed 1536 bit, but the bus width is now adjustable to any size below.

Path	Last modification			Log	RSS feed
mod_sim_exp/	34	4226d 13h	JonasDC	View Log	RSS feed
branches/	1	4248d 19h	root	View Log	RSS feed
tags/	1	4248d 19h	root	View Log	RSS feed
trunk/	34	4226d 13h	JonasDC	View Log	RSS feed
bench/	26	4227d 13h	JonasDC	View Log	RSS feed
rtl/	34	4226d 13h	JonasDC	View Log	RSS feed
vhdl/	34	4226d 13h	JonasDC	View Log	RSS feed
core/	34	4226d 13h	JonasDC	View Log	RSS feed
adder_block.vhd	12	4241d 14h	JonasDC	View Log	RSS feed
adder_n.vhd	13	4241d 14h	JonasDC	View Log	RSS feed
autorun_cntrl.vhd	3	4242d 13h	JonasDC	View Log	RSS feed
cell_1b.vhd	14	4241d 14h	JonasDC	View Log	RSS feed
cell_1b_adder.vhd	9	4241d 19h	JonasDC	View Log	RSS feed
cell_1b_mux.vhd	9	4241d 19h	JonasDC	View Log	RSS feed
counter_sync.vhd	19	4239d 19h	JonasDC	View Log	RSS feed
d_flip_flop.vhd	4	4241d 23h	JonasDC	View Log	RSS feed
fifo_primitive.vhd	3	4242d 13h	JonasDC	View Log	RSS feed
first_stage.vhd	18	4240d 19h	JonasDC	View Log	RSS feed
last_stage.vhd	18	4240d 19h	JonasDC	View Log	RSS feed
modulus_ram.vhd	3	4242d 13h	JonasDC	View Log	RSS feed
mod_sim_exp_core.vhd	34	4226d 13h	JonasDC	View Log	RSS feed
mod_sim_exp_pkg.vhd	34	4226d 13h	JonasDC	View Log	RSS feed
mont_ctrl.vhd	24	4230d 22h	JonasDC	View Log	RSS feed
mont_multiplier.vhd	32	4226d 17h	JonasDC	View Log	RSS feed
mont_mult_sys_pipeline.vhd	23	4230d 23h	JonasDC	View Log	RSS feed
operands_sp.vhd	3	4242d 13h	JonasDC	View Log	RSS feed
operand_dp.vhd	3	4242d 13h	JonasDC	View Log	RSS feed
operand_mem.vhd	34	4226d 13h	JonasDC	View Log	RSS feed
operand_ram.vhd	3	4242d 13h	JonasDC	View Log	RSS feed
register_1b.vhd	6	4241d 22h	JonasDC	View Log	RSS feed
register_n.vhd	15	4241d 13h	JonasDC	View Log	RSS feed
standard_cell_block.vhd	17	4241d 00h	JonasDC	View Log	RSS feed
standard_stage.vhd	18	4240d 19h	JonasDC	View Log	RSS feed
stepping_logic.vhd	19	4239d 19h	JonasDC	View Log	RSS feed
systolic_pipeline.vhd	22	4233d 16h	JonasDC	View Log	RSS feed
sys_first_cell_logic.vhd	31	4226d 22h	JonasDC	View Log	RSS feed
sys_last_cell_logic.vhd	30	4226d 23h	JonasDC	View Log	RSS feed
sys_pipeline.vhd	32	4226d 17h	JonasDC	View Log	RSS feed
sys_stage.vhd	25	4227d 13h	JonasDC	View Log	RSS feed
x_shift_reg.vhd	21	4235d 00h	JonasDC	View Log	RSS feed
interface/	2	4246d 19h	JonasDC	View Log	RSS feed
sim/	31	4226d 22h	JonasDC	View Log	RSS feed
sw/	29	4227d 12h	JonasDC	View Log	RSS feed

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Subversion Repositories mod_sim_exp

[/] [mod_sim_exp/] [trunk/] [rtl/] [vhdl/] [core/] - Rev 34

Last modification