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[/] [mod_sim_exp/] [trunk/] [syn/] - Rev 71

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Last modification

  • Rev 71 2013-03-06 15:27:23 GMT
  • Author: JonasDC
  • Log message:
    added synthesis report for altera and xilinx for the new ram.
    added coregen sources for xilinx for primitive RAM
Path Last modification Log RSS feed
[FOLDER] mod_sim_exp/ 71  4307d 23h JonasDC View Log RSS feed
[NODE][FOLDER] branches/ 68  4308d 01h JonasDC View Log RSS feed
[NODE][FOLDER] tags/ 49  4334d 20h JonasDC View Log RSS feed
[NODE][FOLDER] trunk/ 71  4307d 23h JonasDC View Log RSS feed
[NODE][NODE][FOLDER] bench/ 70  4307d 23h JonasDC View Log RSS feed
[NODE][NODE][FOLDER] doc/ 47  4403d 00h JonasDC View Log RSS feed
[NODE][NODE][FOLDER] rtl/ 69  4307d 23h JonasDC View Log RSS feed
[NODE][NODE][FOLDER] sim/ 70  4307d 23h JonasDC View Log RSS feed
[NODE][NODE][FOLDER] sw/ 29  4427d 18h JonasDC View Log RSS feed
[NODE][NODE][FOLDER] syn/ 71  4307d 23h JonasDC View Log RSS feed
[NODE][NODE][NODE][FOLDER] altera/ 71  4307d 23h JonasDC View Log RSS feed
[NODE][NODE][NODE][FOLDER] xilinx/ 71  4307d 23h JonasDC View Log RSS feed

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