URL https://opencores.org/ocsvn/open8_urisc/open8_urisc/trunk

Subversion Repositories open8_urisc

[/] [open8_urisc/] [trunk/] [VHDL/] - Rev 167

Rev 167 2013-09-18 01:42:00 GMT
Author: jshamlet
Log message:
Updated CPU model; Pipelined ALU control signals to improve fMAX, corrected issue with interrupt controller priority not being obeyed, fixed bug in auto-indexing instructions where the upper register wasn't being properly incremented, cleaned up code to make the processor model easier to follow.
Added several useful modules that use the Open8 bus.

Path	Last modification			Log	RSS feed
open8_urisc/	167	3909d 20h	jshamlet	View Log	RSS feed
branches/	4	5562d 19h	root	View Log	RSS feed
tags/	4	5562d 19h	root	View Log	RSS feed
trunk/	167	3909d 20h	jshamlet	View Log	RSS feed
Documents/	152	4733d 19h	khays	View Log	RSS feed
gnu/	166	4473d 21h	khays	View Log	RSS feed
VHDL/	167	3909d 20h	jshamlet	View Log	RSS feed
o8_alu16.vhd	167	3909d 20h	jshamlet	View Log	RSS feed
o8_gpin.vhd	167	3909d 20h	jshamlet	View Log	RSS feed
o8_gpio.vhd	167	3909d 20h	jshamlet	View Log	RSS feed
o8_gpout.vhd	167	3909d 20h	jshamlet	View Log	RSS feed
o8_pit.vhd	167	3909d 20h	jshamlet	View Log	RSS feed
o8_rtc.vhd	167	3909d 20h	jshamlet	View Log	RSS feed
o8_vdsm8.vhd	167	3909d 20h	jshamlet	View Log	RSS feed
Open8.vhd	167	3909d 20h	jshamlet	View Log	RSS feed
Open8_pkg.vhd	153	4725d 16h	jshamlet	View Log	RSS feed
web_uploads/	6	5562d 07h	root	View Log	RSS feed