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[/] [openmsp430/] [trunk/] [core/] [bench/] - Rev 98

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Last modification

  • Rev 98 2011-02-28 20:20:51 GMT
  • Author: olivier.girard
  • Log message:
    Added support for VCS verilog simulator.
    VPD and TRN waveforms can now be generated.
Path Last modification Log RSS feed
[FOLDER] openmsp430/ 98  5018d 23h olivier.girard View Log RSS feed
[NODE][FOLDER] branches/ 1  5626d 23h root View Log RSS feed
[NODE][FOLDER] tags/ 1  5626d 23h root View Log RSS feed
[NODE][FOLDER] trunk/ 98  5018d 23h olivier.girard View Log RSS feed
[NODE][NODE][FOLDER] core/ 98  5018d 23h olivier.girard View Log RSS feed
[NODE][NODE][NODE][FOLDER] bench/ 98  5018d 23h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] verilog/ 98  5018d 23h olivier.girard View Log RSS feed
[NODE][NODE][NODE][FOLDER] doc/ 2  5626d 22h olivier.girard View Log RSS feed
[NODE][NODE][NODE][FOLDER] rtl/ 91  5026d 23h olivier.girard View Log RSS feed
[NODE][NODE][NODE][FOLDER] sim/ 98  5018d 23h olivier.girard View Log RSS feed
[NODE][NODE][NODE][FOLDER] synthesis/ 73  5228d 00h olivier.girard View Log RSS feed
[NODE][NODE][FOLDER] doc/ 74  5202d 23h olivier.girard View Log RSS feed
[NODE][NODE][FOLDER] fpga/ 98  5018d 23h olivier.girard View Log RSS feed
[NODE][NODE][FOLDER] tools/ 97  5019d 22h olivier.girard View Log RSS feed

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