URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src-c/] [coremark_v1.0/] [docs/] - Rev 228

Rev 145 2012-05-30 21:03:05 GMT
Author: olivier.girard
Log message:
Add Dhrystone and CoreMark benchmarks to the simulation environment.

Path	Last modification			Log	RSS feed
openmsp430/	228	2255d 06h	olivier.girard	View Log	RSS feed
branches/	1	5459d 08h	root	View Log	RSS feed
tags/	1	5459d 08h	root	View Log	RSS feed
trunk/	228	2255d 06h	olivier.girard	View Log	RSS feed
core/	211	3128d 17h	olivier.girard	View Log	RSS feed
bench/	205	3253d 07h	olivier.girard	View Log	RSS feed
doc/	2	5459d 06h	olivier.girard	View Log	RSS feed
rtl/	205	3253d 07h	olivier.girard	View Log	RSS feed
sim/	211	3128d 17h	olivier.girard	View Log	RSS feed
rtl_sim/	211	3128d 17h	olivier.girard	View Log	RSS feed
bin/	207	3156d 07h	olivier.girard	View Log	RSS feed
run/	202	3267d 07h	olivier.girard	View Log	RSS feed
src-c/	211	3128d 17h	olivier.girard	View Log	RSS feed
coremark_v1.0/	211	3128d 17h	olivier.girard	View Log	RSS feed
docs/	145	4394d 07h	olivier.girard	View Log	RSS feed
Coremark-requirements.doc	145	4394d 07h	olivier.girard	View Log	RSS feed
LICENSE.DOC	145	4394d 07h	olivier.girard	View Log	RSS feed
r01an0757eu_rx.pdf	145	4394d 07h	olivier.girard	View Log	RSS feed
msp430/	211	3128d 17h	olivier.girard	View Log	RSS feed
dhrystone_4mcu/	211	3128d 17h	olivier.girard	View Log	RSS feed
dhrystone_v2.1/	211	3128d 17h	olivier.girard	View Log	RSS feed
sandbox/	211	3128d 17h	olivier.girard	View Log	RSS feed
src/	204	3260d 07h	olivier.girard	View Log	RSS feed
synthesis/	200	3428d 06h	olivier.girard	View Log	RSS feed
doc/	226	2408d 05h	olivier.girard	View Log	RSS feed
fpga/	223	2776d 05h	olivier.girard	View Log	RSS feed
tools/	227	2255d 06h	olivier.girard	View Log	RSS feed