URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src-c/] [dhrystone_v2.1/] [doc/] - Rev 228

Rev 145 2012-05-30 21:03:05 GMT
Author: olivier.girard
Log message:
Add Dhrystone and CoreMark benchmarks to the simulation environment.

Path	Last modification			Log	RSS feed
openmsp430/	228	2507d 10h	olivier.girard	View Log	RSS feed
branches/	1	5711d 12h	root	View Log	RSS feed
tags/	1	5711d 12h	root	View Log	RSS feed
trunk/	228	2507d 10h	olivier.girard	View Log	RSS feed
core/	211	3380d 21h	olivier.girard	View Log	RSS feed
bench/	205	3505d 11h	olivier.girard	View Log	RSS feed
doc/	2	5711d 10h	olivier.girard	View Log	RSS feed
rtl/	205	3505d 11h	olivier.girard	View Log	RSS feed
sim/	211	3380d 21h	olivier.girard	View Log	RSS feed
rtl_sim/	211	3380d 21h	olivier.girard	View Log	RSS feed
bin/	207	3408d 11h	olivier.girard	View Log	RSS feed
run/	202	3519d 11h	olivier.girard	View Log	RSS feed
src-c/	211	3380d 21h	olivier.girard	View Log	RSS feed
coremark_v1.0/	211	3380d 21h	olivier.girard	View Log	RSS feed
dhrystone_4mcu/	211	3380d 21h	olivier.girard	View Log	RSS feed
dhrystone_v2.1/	211	3380d 21h	olivier.girard	View Log	RSS feed
doc/	145	4646d 11h	olivier.girard	View Log	RSS feed
reu05b0134_rxap.pdf	145	4646d 11h	olivier.girard	View Log	RSS feed
mylib/	211	3380d 21h	olivier.girard	View Log	RSS feed
original_files/	145	4646d 11h	olivier.girard	View Log	RSS feed
sandbox/	211	3380d 21h	olivier.girard	View Log	RSS feed
src/	204	3512d 11h	olivier.girard	View Log	RSS feed
synthesis/	200	3680d 10h	olivier.girard	View Log	RSS feed
doc/	226	2660d 09h	olivier.girard	View Log	RSS feed
fpga/	223	3028d 09h	olivier.girard	View Log	RSS feed
tools/	227	2507d 10h	olivier.girard	View Log	RSS feed