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[/] [openmsp430/] [trunk/] [core/] [synthesis/] [actel/] - Rev 228

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  • Rev 111 2011-05-20 20:39:02 GMT
  • Author: olivier.girard
  • Log message:
    Re-organized the "openMSP430_defines.v" file.
    Re-defined the CPU_ID register of the debug interface (in particular to support custom user versioning).
    Added RTL configuration possibility to expand the peripheral address space from 512B (0x0000 to 0x0200) to up to 32kB (0x0000 to 0x8000).
    As a consequence the per_addr bus width goes from 8 to 14 bits and the peripherals address decoders have been updated accordingly.
Path Last modification Log RSS feed
[FOLDER] openmsp430/ 228  2578d 06h olivier.girard View Log RSS feed
[NODE][FOLDER] branches/ 1  5782d 08h root View Log RSS feed
[NODE][FOLDER] tags/ 1  5782d 08h root View Log RSS feed
[NODE][FOLDER] trunk/ 228  2578d 06h olivier.girard View Log RSS feed
[NODE][NODE][FOLDER] core/ 211  3451d 17h olivier.girard View Log RSS feed
[NODE][NODE][NODE][FOLDER] bench/ 205  3576d 07h olivier.girard View Log RSS feed
[NODE][NODE][NODE][FOLDER] doc/ 2  5782d 06h olivier.girard View Log RSS feed
[NODE][NODE][NODE][FOLDER] rtl/ 205  3576d 07h olivier.girard View Log RSS feed
[NODE][NODE][NODE][FOLDER] sim/ 211  3451d 17h olivier.girard View Log RSS feed
[NODE][NODE][NODE][FOLDER] synthesis/ 200  3751d 06h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] actel/ 111  5093d 07h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FOLDER] src/ 64  5553d 15h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] design_files.sdc 64  5553d 15h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] design_files.v 111  5093d 07h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] libero_designer.tcl 64  5553d 15h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] run_analysis.log 64  5553d 15h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] run_analysis.mpy.log 68  5532d 16h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] run_analysis.tcl 68  5532d 16h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] synplify.tcl 64  5553d 15h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] altera/ 134  4786d 07h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] synopsys/ 200  3751d 06h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] xilinx/ 200  3751d 06h olivier.girard View Log RSS feed
[NODE][NODE][FOLDER] doc/ 226  2731d 05h olivier.girard View Log RSS feed
[NODE][NODE][FOLDER] fpga/ 223  3099d 05h olivier.girard View Log RSS feed
[NODE][NODE][FOLDER] tools/ 227  2578d 06h olivier.girard View Log RSS feed

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