OpenCores
URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [core/] [synthesis/] [actel/] - Rev 228

Rev

Changes | View Log | RSS feed

Last modification

  • Rev 111 2011-05-20 20:39:02 GMT
  • Author: olivier.girard
  • Log message:
    Re-organized the "openMSP430_defines.v" file.
    Re-defined the CPU_ID register of the debug interface (in particular to support custom user versioning).
    Added RTL configuration possibility to expand the peripheral address space from 512B (0x0000 to 0x0200) to up to 32kB (0x0000 to 0x8000).
    As a consequence the per_addr bus width goes from 8 to 14 bits and the peripherals address decoders have been updated accordingly.
Path Last modification Log RSS feed
[FOLDER] openmsp430/ 228  2749d 13h olivier.girard View Log RSS feed
[NODE][FOLDER] branches/ 1  5953d 15h root View Log RSS feed
[NODE][FOLDER] tags/ 1  5953d 15h root View Log RSS feed
[NODE][FOLDER] trunk/ 228  2749d 13h olivier.girard View Log RSS feed
[NODE][NODE][FOLDER] core/ 211  3623d 00h olivier.girard View Log RSS feed
[NODE][NODE][NODE][FOLDER] bench/ 205  3747d 14h olivier.girard View Log RSS feed
[NODE][NODE][NODE][FOLDER] doc/ 2  5953d 13h olivier.girard View Log RSS feed
[NODE][NODE][NODE][FOLDER] rtl/ 205  3747d 14h olivier.girard View Log RSS feed
[NODE][NODE][NODE][FOLDER] sim/ 211  3623d 00h olivier.girard View Log RSS feed
[NODE][NODE][NODE][FOLDER] synthesis/ 200  3922d 13h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] actel/ 111  5264d 14h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FOLDER] src/ 64  5724d 23h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] design_files.sdc 64  5724d 23h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] design_files.v 111  5264d 14h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] libero_designer.tcl 64  5724d 23h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] run_analysis.log 64  5724d 23h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] run_analysis.mpy.log 68  5703d 23h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] run_analysis.tcl 68  5703d 23h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] synplify.tcl 64  5724d 23h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] altera/ 134  4957d 14h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] synopsys/ 200  3922d 13h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] xilinx/ 200  3922d 13h olivier.girard View Log RSS feed
[NODE][NODE][FOLDER] doc/ 226  2902d 12h olivier.girard View Log RSS feed
[NODE][NODE][FOLDER] fpga/ 223  3270d 12h olivier.girard View Log RSS feed
[NODE][NODE][FOLDER] tools/ 227  2749d 13h olivier.girard View Log RSS feed

powered by: WebSVN 2.1.0

© copyright 1999-2025 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.