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[/] [openmsp430/] [trunk/] [core/] [synthesis/] [altera/] - Rev 111

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  • Rev 111 2011-05-20 20:39:02 GMT
  • Author: olivier.girard
  • Log message:
    Re-organized the "openMSP430_defines.v" file.
    Re-defined the CPU_ID register of the debug interface (in particular to support custom user versioning).
    Added RTL configuration possibility to expand the peripheral address space from 512B (0x0000 to 0x0200) to up to 32kB (0x0000 to 0x8000).
    As a consequence the per_addr bus width goes from 8 to 14 bits and the peripherals address decoders have been updated accordingly.
Path Last modification Log RSS feed
[FOLDER] openmsp430/ 111  4941d 17h olivier.girard View Log RSS feed
[NODE][FOLDER] branches/ 1  5630d 18h root View Log RSS feed
[NODE][FOLDER] tags/ 1  5630d 18h root View Log RSS feed
[NODE][FOLDER] trunk/ 111  4941d 17h olivier.girard View Log RSS feed
[NODE][NODE][FOLDER] core/ 111  4941d 17h olivier.girard View Log RSS feed
[NODE][NODE][NODE][FOLDER] bench/ 111  4941d 17h olivier.girard View Log RSS feed
[NODE][NODE][NODE][FOLDER] doc/ 2  5630d 16h olivier.girard View Log RSS feed
[NODE][NODE][NODE][FOLDER] rtl/ 111  4941d 17h olivier.girard View Log RSS feed
[NODE][NODE][NODE][FOLDER] sim/ 111  4941d 17h olivier.girard View Log RSS feed
[NODE][NODE][NODE][FOLDER] synthesis/ 111  4941d 17h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] actel/ 111  4941d 17h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] altera/ 111  4941d 17h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FOLDER] src/ 68  5381d 02h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] design_files.v 111  4941d 17h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] openMSP430_fpga.tcl 63  5402d 02h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] run_analysis.area.log 63  5402d 02h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] run_analysis.area.mpy.log 68  5381d 02h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] run_analysis.speed.log 63  5402d 02h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] run_analysis.speed.mpy.log 68  5381d 02h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FILE] run_analysis.tcl 68  5381d 02h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] synopsys/ 111  4941d 17h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] xilinx/ 111  4941d 17h olivier.girard View Log RSS feed
[NODE][NODE][FOLDER] doc/ 100  5021d 16h olivier.girard View Log RSS feed
[NODE][NODE][FOLDER] fpga/ 111  4941d 17h olivier.girard View Log RSS feed
[NODE][NODE][FOLDER] tools/ 110  4942d 17h olivier.girard View Log RSS feed

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