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[/] [openmsp430/] [trunk/] [fpga/] - Rev 204

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Last modification

  • Rev 204 2015-07-08 20:34:10 GMT
  • Author: olivier.girard
  • Log message:
    Fix DMA interface RTL merge problem (defines got wrong values). Fix CDC issue with the timerA (thanks to Johan for catching that).
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[FOLDER] openmsp430/ 204  3406d 19h olivier.girard View Log RSS feed
[NODE][FOLDER] branches/ 1  5605d 20h root View Log RSS feed
[NODE][FOLDER] tags/ 1  5605d 20h root View Log RSS feed
[NODE][FOLDER] trunk/ 204  3406d 19h olivier.girard View Log RSS feed
[NODE][NODE][FOLDER] core/ 204  3406d 19h olivier.girard View Log RSS feed
[NODE][NODE][FOLDER] doc/ 204  3406d 19h olivier.girard View Log RSS feed
[NODE][NODE][FOLDER] fpga/ 204  3406d 19h olivier.girard View Log RSS feed
[NODE][NODE][NODE][FOLDER] actel_m1a3pl_dev_kit/ 204  3406d 19h olivier.girard View Log RSS feed
[NODE][NODE][NODE][FOLDER] altera_de1_board/ 204  3406d 19h olivier.girard View Log RSS feed
[NODE][NODE][NODE][FOLDER] xilinx_avnet_lx9microbard/ 204  3406d 19h olivier.girard View Log RSS feed
[NODE][NODE][NODE][FOLDER] xilinx_diligent_s3board/ 204  3406d 19h olivier.girard View Log RSS feed
[NODE][NODE][FOLDER] tools/ 198  3680d 20h olivier.girard View Log RSS feed

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