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[/] [openmsp430/] [trunk/] [fpga/] [OBSOLETE/] [altera_de1_board/] [bench/] [verilog/] - Rev 94

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Last modification

  • Rev 94 2011-02-24 20:33:35 GMT
  • Author: olivier.girard
  • Log message:
    Thanks to Mihai-Costin Manolescu's contribution, the simulation scripts now support the following simulators:
    - Icarus Verilog
    - Cver
    - Verilog-XL
    - NCVerilog
    - Modelsim
Path Last modification Log RSS feed
[FOLDER] openmsp430/ 94  5016d 09h olivier.girard View Log RSS feed
[NODE][FOLDER] branches/ 1  5620d 10h root View Log RSS feed
[NODE][FOLDER] tags/ 1  5620d 10h root View Log RSS feed
[NODE][FOLDER] trunk/ 94  5016d 09h olivier.girard View Log RSS feed
[NODE][NODE][FOLDER] core/ 94  5016d 09h olivier.girard View Log RSS feed
[NODE][NODE][FOLDER] doc/ 74  5196d 10h olivier.girard View Log RSS feed
[NODE][NODE][FOLDER] fpga/ 94  5016d 09h olivier.girard View Log RSS feed
[NODE][NODE][NODE][FOLDER] actel_m1a3pl_dev_kit/ 94  5016d 09h olivier.girard View Log RSS feed
[NODE][NODE][NODE][FOLDER] altera_de1_board/ 94  5016d 09h olivier.girard View Log RSS feed
[NODE][NODE][NODE][FOLDER] xilinx_diligent_s3board/ 94  5016d 09h olivier.girard View Log RSS feed
[NODE][NODE][FOLDER] tools/ 93  5020d 09h olivier.girard View Log RSS feed

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