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[/] [openmsp430/] [trunk/] [fpga/] [actel_m1a3pl_dev_kit/] [synthesis/] - Rev 155

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Last modification

  • Rev 155 2012-10-15 21:35:05 GMT
  • Author: olivier.girard
  • Log message:
    Update FPGA projects with the latest openMSP430 verilog code.
Path Last modification Log RSS feed
[FOLDER] openmsp430/ 155  4403d 01h olivier.girard View Log RSS feed
[NODE][FOLDER] branches/ 1  5606d 03h root View Log RSS feed
[NODE][FOLDER] tags/ 1  5606d 03h root View Log RSS feed
[NODE][FOLDER] trunk/ 155  4403d 01h olivier.girard View Log RSS feed
[NODE][NODE][FOLDER] core/ 154  4403d 02h olivier.girard View Log RSS feed
[NODE][NODE][FOLDER] doc/ 151  4488d 00h olivier.girard View Log RSS feed
[NODE][NODE][FOLDER] fpga/ 155  4403d 01h olivier.girard View Log RSS feed
[NODE][NODE][NODE][FOLDER] actel_m1a3pl_dev_kit/ 155  4403d 01h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] bench/ 143  4562d 02h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] doc/ 80  5083d 09h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] rtl/ 155  4403d 01h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] sim/ 155  4403d 01h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] software/ 143  4562d 02h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] synthesis/ 155  4403d 01h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FOLDER] actel/ 155  4403d 01h olivier.girard View Log RSS feed
[NODE][NODE][NODE][FOLDER] altera_de1_board/ 155  4403d 01h olivier.girard View Log RSS feed
[NODE][NODE][NODE][FOLDER] xilinx_avnet_lx9microbard/ 136  4610d 01h olivier.girard View Log RSS feed
[NODE][NODE][NODE][FOLDER] xilinx_diligent_s3board/ 155  4403d 01h olivier.girard View Log RSS feed
[NODE][NODE][FOLDER] tools/ 133  4610d 02h olivier.girard View Log RSS feed

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