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[/] [openmsp430/] [trunk/] [fpga/] [xilinx_avnet_lx9microbard/] [rtl/] [verilog/] [coregen/] [ram_16x1k_sp/] [doc/] - Rev 228

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Last modification

  • Rev 167 2012-12-06 21:04:46 GMT
  • Author: olivier.girard
  • Log message:
    Update LX9 Microboard FPGA example.
    It now includes a dual-core oMSP system with a shared 16kB program memory.
    Each core has its own 2kB data memory and an additional 2kB shared data memory.
Path Last modification Log RSS feed
[FOLDER] openmsp430/ 228  2426d 20h olivier.girard View Log RSS feed
[NODE][FOLDER] branches/ 1  5630d 22h root View Log RSS feed
[NODE][FOLDER] tags/ 1  5630d 22h root View Log RSS feed
[NODE][FOLDER] trunk/ 228  2426d 20h olivier.girard View Log RSS feed
[NODE][NODE][FOLDER] core/ 211  3300d 06h olivier.girard View Log RSS feed
[NODE][NODE][FOLDER] doc/ 226  2579d 19h olivier.girard View Log RSS feed
[NODE][NODE][FOLDER] fpga/ 223  2947d 19h olivier.girard View Log RSS feed
[NODE][NODE][NODE][FOLDER] actel_m1a3pl_dev_kit/ 212  3300d 06h olivier.girard View Log RSS feed
[NODE][NODE][NODE][FOLDER] altera_de0_nano_soc/ 223  2947d 19h olivier.girard View Log RSS feed
[NODE][NODE][NODE][FOLDER] OBSOLETE/ 221  3025d 20h olivier.girard View Log RSS feed
[NODE][NODE][NODE][FOLDER] xilinx_avnet_lx9microbard/ 212  3300d 06h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] bench/ 167  4375d 20h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] doc/ 157  4427d 20h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] rtl/ 212  3300d 06h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FOLDER] verilog/ 212  3300d 06h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][FOLDER] coregen/ 200  3599d 19h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][NODE][FOLDER] ram_16x1k_dp/ 167  4375d 20h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][NODE][FOLDER] ram_16x1k_sp/ 167  4375d 20h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][NODE][NODE][FOLDER] doc/ 167  4375d 20h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][NODE][NODE][NODE][DB-FILE] blk_mem_gen_v7_2_vinfo.html 167  4375d 20h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][NODE][NODE][NODE][FILE] pg058-blk-mem-gen.pdf 167  4375d 20h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][NODE][NODE][FOLDER] example_design/ 167  4375d 20h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][NODE][NODE][FOLDER] implement/ 167  4375d 20h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][NODE][NODE][FOLDER] simulation/ 167  4375d 20h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][NODE][FOLDER] ram_16x8k_dp/ 167  4375d 20h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][FOLDER] coregen_chipscope/ 200  3599d 19h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][FOLDER] openmsp430/ 205  3424d 20h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] sim/ 212  3300d 06h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] software/ 212  3300d 06h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] synthesis/ 212  3300d 06h olivier.girard View Log RSS feed
[NODE][NODE][NODE][FOLDER] xilinx_diligent_s3board/ 212  3300d 06h olivier.girard View Log RSS feed
[NODE][NODE][FOLDER] tools/ 227  2426d 20h olivier.girard View Log RSS feed

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