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[/] [openmsp430/] [trunk/] [fpga/] [xilinx_diligent_s3board/] [rtl/] - Rev 155

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Last modification

  • Rev 155 2012-10-15 21:35:05 GMT
  • Author: olivier.girard
  • Log message:
    Update FPGA projects with the latest openMSP430 verilog code.
Path Last modification Log RSS feed
[FOLDER] openmsp430/ 155  4402d 16h olivier.girard View Log RSS feed
[NODE][FOLDER] branches/ 1  5605d 18h root View Log RSS feed
[NODE][FOLDER] tags/ 1  5605d 18h root View Log RSS feed
[NODE][FOLDER] trunk/ 155  4402d 16h olivier.girard View Log RSS feed
[NODE][NODE][FOLDER] core/ 154  4402d 17h olivier.girard View Log RSS feed
[NODE][NODE][FOLDER] doc/ 151  4487d 15h olivier.girard View Log RSS feed
[NODE][NODE][FOLDER] fpga/ 155  4402d 16h olivier.girard View Log RSS feed
[NODE][NODE][NODE][FOLDER] actel_m1a3pl_dev_kit/ 155  4402d 16h olivier.girard View Log RSS feed
[NODE][NODE][NODE][FOLDER] altera_de1_board/ 155  4402d 16h olivier.girard View Log RSS feed
[NODE][NODE][NODE][FOLDER] xilinx_avnet_lx9microbard/ 136  4609d 16h olivier.girard View Log RSS feed
[NODE][NODE][NODE][FOLDER] xilinx_diligent_s3board/ 155  4402d 16h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] bench/ 153  4457d 15h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] doc/ 2  5605d 16h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] rtl/ 155  4402d 16h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FOLDER] verilog/ 155  4402d 16h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] sim/ 155  4402d 16h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] software/ 155  4402d 16h olivier.girard View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] synthesis/ 155  4402d 16h olivier.girard View Log RSS feed
[NODE][NODE][FOLDER] tools/ 133  4609d 17h olivier.girard View Log RSS feed

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