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https://opencores.org/ocsvn/openmsp430/openmsp430/trunk
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[/] [openmsp430/] [trunk/] [fpga/] [xilinx_diligent_s3board/] [sim/] [rtl_sim/] - Rev 98
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Last modification
- Rev 98 2011-02-28 20:20:51 GMT
- Author: olivier.girard
- Log message:
- Added support for VCS verilog simulator.
VPD and TRN waveforms can now be generated.