URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Last modification

• Rev 411 2010-11-04 13:09:21 GMT
• Author: julius

• Log message:

  Improved ethmac testbench and software.
  
  Renamed some OR1200 library functions to be more generic.
  
  Fixed bug with versatile_mem_ctrl for Actel board.
  
  Added ability to simulate gatelevel modules alongside RTL modules
  in board build.

Path	Last modification			Log	RSS feed
openrisc/	411	5503d 20h	julius	View Log	RSS feed
branches/	1	6065d 23h	ocadmin	View Log	RSS feed
tags/	388	5536d 18h	jeremybennett	View Log	RSS feed
trunk/	411	5503d 20h	julius	View Log	RSS feed
bootloaders/	406	5505d 11h	julius	View Log	RSS feed
docs/	359	5558d 21h	julius	View Log	RSS feed
gnu-patches/	170	5626d 19h	jeremybennett	View Log	RSS feed
gnu-src/	404	5505d 16h	jeremybennett	View Log	RSS feed
linux/	380	5538d 16h	julius	View Log	RSS feed
or1ksim/	387	5536d 18h	jeremybennett	View Log	RSS feed
or1k_startup/	2	6065d 23h	marcus.erlandsson	View Log	RSS feed
or1200/	401	5506d 18h	julius	View Log	RSS feed
orpsocv2/	411	5503d 20h	julius	View Log	RSS feed
bench/	408	5505d 08h	julius	View Log	RSS feed
boards/	411	5503d 20h	julius	View Log	RSS feed
actel/	411	5503d 20h	julius	View Log	RSS feed
xilinx/	360	5558d 15h	julius	View Log	RSS feed
readme.txt	71	5758d 00h	julius	View Log	RSS feed
tools.inc	67	5765d 00h	julius	View Log	RSS feed
doc/	410	5504d 19h	julius	View Log	RSS feed
rtl/	411	5503d 20h	julius	View Log	RSS feed
sim/	411	5503d 20h	julius	View Log	RSS feed
sw/	411	5503d 20h	julius	View Log	RSS feed
or_debug_proxy/	376	5544d 00h	julius	View Log	RSS feed
rtos/	174	5626d 19h	jeremybennett	View Log	RSS feed
toolchain_install_scripts/	407	5505d 11h	julius	View Log	RSS feed
uClibc/	382	5538d 16h	julius	View Log	RSS feed