URL
https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk
Subversion Repositories openrisc_2011-10-31
[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] [actel/] [ordb1a3pe1500/] [rtl/] - Rev 503
Go to most recent revision | Changes | View Log | RSS feed
Last modification
- Rev 503 2011-03-13 22:49:48 GMT
- Author: julius
- Log message:
- ORPSoC's or1200 defines fix to indicate we don't actually have I/DMMU invalidate registers.