OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] [xilinx/] [ml501/] [backend/] [par/] [bin/] - Rev 415

Rev

Go to most recent revision | Changes | View Log | RSS feed

Last modification

  • Rev 415 2010-11-08 14:53:17 GMT
  • Author: julius
  • Log message:
    ORPSoC - ML501 update, working again.
    Documentation update including information on ML501 build
    OR1200 updates to do with instruction cache tag signal when
    invalidate instruction used.
    Added ability to define address to pass to SPI flash when
    booting.
    Added SPI sw test for board which allows inspection of
    data in a flash.
Path Last modification Log RSS feed
[FOLDER] openrisc/ 415  4981d 05h julius View Log RSS feed
[NODE][FOLDER] branches/ 1  5547d 10h ocadmin View Log RSS feed
[NODE][FOLDER] tags/ 388  5018d 05h jeremybennett View Log RSS feed
[NODE][FOLDER] trunk/ 415  4981d 05h julius View Log RSS feed
[NODE][NODE][FOLDER] bootloaders/ 406  4986d 22h julius View Log RSS feed
[NODE][NODE][FOLDER] docs/ 359  5040d 08h julius View Log RSS feed
[NODE][NODE][FOLDER] gnu-patches/ 170  5108d 06h jeremybennett View Log RSS feed
[NODE][NODE][FOLDER] gnu-src/ 414  4982d 00h jeremybennett View Log RSS feed
[NODE][NODE][FOLDER] linux/ 380  5020d 03h julius View Log RSS feed
[NODE][NODE][FOLDER] or1ksim/ 387  5018d 05h jeremybennett View Log RSS feed
[NODE][NODE][FOLDER] or1k_startup/ 2  5547d 10h marcus.erlandsson View Log RSS feed
[NODE][NODE][FOLDER] or1200/ 401  4988d 05h julius View Log RSS feed
[NODE][NODE][FOLDER] orpsocv2/ 415  4981d 05h julius View Log RSS feed
[NODE][NODE][NODE][FOLDER] bench/ 415  4981d 05h julius View Log RSS feed
[NODE][NODE][NODE][FOLDER] boards/ 415  4981d 05h julius View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] actel/ 415  4981d 05h julius View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] xilinx/ 415  4981d 05h julius View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FOLDER] backend/ 412  4984d 19h julius View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FOLDER] ml501/ 415  4981d 05h julius View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][FOLDER] backend/ 415  4981d 05h julius View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][NODE][FOLDER] bin/ 415  4981d 05h julius View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][NODE][FOLDER] par/ 415  4981d 05h julius View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][NODE][NODE][FOLDER] bin/ 415  4981d 05h julius View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][NODE][NODE][NODE][FILE] Makefile 415  4981d 05h julius View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][NODE][NODE][NODE][FILE] ml501.ucf 415  4981d 05h julius View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][NODE][NODE][FOLDER] prebuilt/ 415  4981d 05h julius View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][NODE][NODE][FOLDER] run/ 415  4981d 05h julius View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][FOLDER] bench/ 415  4981d 05h julius View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][FOLDER] rtl/ 415  4981d 05h julius View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][FOLDER] sim/ 415  4981d 05h julius View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][FOLDER] sw/ 415  4981d 05h julius View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][FOLDER] syn/ 415  4981d 05h julius View Log RSS feed
[NODE][NODE][NODE][FOLDER] doc/ 415  4981d 05h julius View Log RSS feed
[NODE][NODE][NODE][FOLDER] rtl/ 415  4981d 05h julius View Log RSS feed
[NODE][NODE][NODE][FOLDER] sim/ 411  4985d 07h julius View Log RSS feed
[NODE][NODE][NODE][FOLDER] sw/ 415  4981d 05h julius View Log RSS feed
[NODE][NODE][FOLDER] or_debug_proxy/ 376  5025d 11h julius View Log RSS feed
[NODE][NODE][FOLDER] rtos/ 174  5108d 06h jeremybennett View Log RSS feed
[NODE][NODE][FOLDER] toolchain_install_scripts/ 407  4986d 22h julius View Log RSS feed
[NODE][NODE][FOLDER] uClibc/ 382  5020d 03h julius View Log RSS feed

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.