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URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] [xilinx/] [ml501/] [bench/] [verilog/] [include/] - Rev 485

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  • Rev 485 2011-02-04 09:33:38 GMT
  • Author: julius
  • Log message:
    ORPSoC updates - or1200 monitor now has separate defines file, ethmac updates to fifos and wishbone IF, board.h changes for UART (may propegate to other drivers with multiple cores, we'll see), crt0.S for or1200 now zeros all registers on reset, adding own ethernet tests for ML501
Path Last modification Log RSS feed
[FOLDER] openrisc/ 485  5137d 01h julius View Log RSS feed
[NODE][FOLDER] branches/ 1  5791d 01h ocadmin View Log RSS feed
[NODE][FOLDER] tags/ 388  5261d 19h jeremybennett View Log RSS feed
[NODE][FOLDER] trunk/ 485  5137d 01h julius View Log RSS feed
[NODE][NODE][FOLDER] bootloaders/ 467  5163d 23h julius View Log RSS feed
[NODE][NODE][FOLDER] docs/ 431  5209d 18h julius View Log RSS feed
[NODE][NODE][FOLDER] gnu-patches/ 170  5351d 21h jeremybennett View Log RSS feed
[NODE][NODE][FOLDER] gnu-src/ 484  5137d 23h jeremybennett View Log RSS feed
[NODE][NODE][FOLDER] linux/ 380  5263d 18h julius View Log RSS feed
[NODE][NODE][FOLDER] or1ksim/ 483  5140d 01h jeremybennett View Log RSS feed
[NODE][NODE][FOLDER] or1k_startup/ 2  5791d 01h marcus.erlandsson View Log RSS feed
[NODE][NODE][FOLDER] or1200/ 481  5153d 08h julius View Log RSS feed
[NODE][NODE][FOLDER] orpsocv2/ 485  5137d 01h julius View Log RSS feed
[NODE][NODE][NODE][FOLDER] bench/ 485  5137d 01h julius View Log RSS feed
[NODE][NODE][NODE][FOLDER] boards/ 485  5137d 01h julius View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] actel/ 485  5137d 01h julius View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] xilinx/ 485  5137d 01h julius View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FOLDER] backend/ 412  5228d 09h julius View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FOLDER] ml501/ 485  5137d 01h julius View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][FOLDER] backend/ 479  5155d 05h julius View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][FOLDER] bench/ 485  5137d 01h julius View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][NODE][FOLDER] verilog/ 485  5137d 01h julius View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][NODE][NODE][FOLDER] include/ 485  5137d 01h julius View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][NODE][NODE][NODE][FILE] ddr2_model_parameters.v 412  5228d 09h julius View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][NODE][NODE][NODE][FILE] ddr2_model_preload.v 415  5224d 19h julius View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][NODE][NODE][NODE][FILE] eth_phy_defines.v 412  5228d 09h julius View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][NODE][NODE][NODE][FILE] eth_stim.v 485  5137d 01h julius View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][NODE][NODE][NODE][FILE] synthesis-defines.v 412  5228d 09h julius View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][NODE][NODE][NODE][FILE] timescale.v 412  5228d 09h julius View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][FOLDER] rtl/ 485  5137d 01h julius View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][FOLDER] sim/ 479  5155d 05h julius View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][FOLDER] sw/ 485  5137d 01h julius View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][FOLDER] syn/ 468  5163d 01h julius View Log RSS feed
[NODE][NODE][NODE][FOLDER] doc/ 485  5137d 01h julius View Log RSS feed
[NODE][NODE][NODE][FOLDER] rtl/ 485  5137d 01h julius View Log RSS feed
[NODE][NODE][NODE][FOLDER] sim/ 485  5137d 01h julius View Log RSS feed
[NODE][NODE][NODE][FOLDER] sw/ 485  5137d 01h julius View Log RSS feed
[NODE][NODE][FOLDER] or_debug_proxy/ 431  5209d 18h julius View Log RSS feed
[NODE][NODE][FOLDER] rtos/ 474  5158d 06h julius View Log RSS feed
[NODE][NODE][FOLDER] toolchain_install_scripts/ 407  5230d 12h julius View Log RSS feed
[NODE][NODE][FOLDER] uClibc/ 382  5263d 18h julius View Log RSS feed

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