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[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] [xilinx/] [ml501/] [rtl/] [verilog/] [arbiter/] - Rev 412
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Last modification
- Rev 412 2010-11-05 01:00:58 GMT
- Author: julius
- Log message:
- ORPSoC update - Rearranged Xilinx ML501, simulations working again.