URL
https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk
Subversion Repositories openrisc_2011-10-31
[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] [xilinx/] [ml501/] [sim/] - Rev 479
Go to most recent revision | Changes | View Log | RSS feed
Last modification
- Rev 479 2011-01-17 05:44:06 GMT
- Author: julius
- Log message:
- ORPSoC update to ml501 board port. Memory controller caching fixed up, does multiple lines of cache and Wishbone bursting.