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https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk
Subversion Repositories openrisc_2011-10-31
[/] [openrisc/] [trunk/] [orpsocv2/] [rtl/] [verilog/] [include/] - Rev 503
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Last modification
- Rev 503 2011-03-13 22:49:48 GMT
- Author: julius
- Log message:
- ORPSoC's or1200 defines fix to indicate we don't actually have I/DMMU invalidate registers.