Subversion Repositories openrisc

Last modification

• Rev 354 2010-09-08 18:00:48 GMT
• Author: julius

• Log message:

  Fixed ORPSoCv2 Dhrystone test, rewrote timer interrut
  
  * sw/support/crt0.S: Tick timer interrupt to increment variable
  now in place instead of calling customisable
  interrupt vector handler
  
  Changed all system frequencies in design to 50MHz.