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URL https://opencores.org/ocsvn/or1k_soc_on_altera_embedded_dev_kit/or1k_soc_on_altera_embedded_dev_kit/trunk

Subversion Repositories or1k_soc_on_altera_embedded_dev_kit

[/] [or1k_soc_on_altera_embedded_dev_kit/] [trunk/] [soc/] [rtl/] [adv_debug_sys/] [Hardware/] [jtag/] [cells/] [rtl/] - Rev 21

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Last modification

  • Rev 21 2010-01-18 16:20:37 GMT
  • Author: xianfeng
  • Log message:
    merge adv_debug_sys r33 that adds high_speed and with my ftdi
Path Last modification Log RSS feed
[FOLDER] or1k_soc_on_altera_embedded_dev_kit/ 21  5276d 18h xianfeng View Log RSS feed
[NODE][FOLDER] branches/ 1  5340d 04h root View Log RSS feed
[NODE][FOLDER] tags/ 15  5329d 17h xianfeng View Log RSS feed
[NODE][FOLDER] trunk/ 21  5276d 18h xianfeng View Log RSS feed
[NODE][NODE][FOLDER] configs/ 18  5326d 19h xianfeng View Log RSS feed
[NODE][NODE][FOLDER] docs/ 6  5338d 05h xianfeng View Log RSS feed
[NODE][NODE][FOLDER] linux-2.6/ 19  5304d 19h xianfeng View Log RSS feed
[NODE][NODE][FOLDER] soc/ 21  5276d 18h xianfeng View Log RSS feed
[NODE][NODE][NODE][FOLDER] bench/ 12  5329d 23h xianfeng View Log RSS feed
[NODE][NODE][NODE][FOLDER] doc/ 12  5329d 23h xianfeng View Log RSS feed
[NODE][NODE][NODE][FOLDER] prj/ 21  5276d 18h xianfeng View Log RSS feed
[NODE][NODE][NODE][FOLDER] rtl/ 21  5276d 18h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] adv_debug_sys/ 21  5276d 18h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FOLDER] Hardware/ 21  5276d 18h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][FOLDER] adv_dbg_if/ 21  5276d 18h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][FOLDER] altera_virtual_jtag/ 21  5276d 18h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][FOLDER] jtag/ 21  5276d 18h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][NODE][FOLDER] BSDL/ 21  5276d 18h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][NODE][FOLDER] cells/ 21  5276d 18h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][NODE][NODE][FOLDER] rtl/ 21  5276d 18h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][NODE][NODE][NODE][FOLDER] verilog/ 21  5276d 18h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][NODE][FOLDER] tap/ 21  5276d 18h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][FOLDER] xilinx_internal_jtag/ 21  5276d 18h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] altera_ddr_ctrl/ 12  5329d 23h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] altera_pll/ 12  5329d 23h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] altera_ram/ 12  5329d 23h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] dbg_interface/ 12  5329d 23h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] ethernet/ 12  5329d 23h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] flash_sram/ 12  5329d 23h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] gpio/ 12  5329d 23h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] mem_if/ 12  5329d 23h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] mmc_sd/ 17  5327d 02h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] or1200/ 12  5329d 23h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] rom_wb/ 12  5329d 23h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] spi/ 12  5329d 23h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] uart16550/ 12  5329d 23h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] wb_conmax/ 12  5329d 23h xianfeng View Log RSS feed
[NODE][NODE][NODE][FOLDER] sim/ 12  5329d 23h xianfeng View Log RSS feed
[NODE][NODE][NODE][FOLDER] sw/ 21  5276d 18h xianfeng View Log RSS feed
[NODE][NODE][NODE][FOLDER] syn/ 12  5329d 23h xianfeng View Log RSS feed

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