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URL https://opencores.org/ocsvn/or1k_soc_on_altera_embedded_dev_kit/or1k_soc_on_altera_embedded_dev_kit/trunk

Subversion Repositories or1k_soc_on_altera_embedded_dev_kit

[/] [or1k_soc_on_altera_embedded_dev_kit/] [trunk/] [soc/] [rtl/] [dbg_interface/] [rtl/] [verilog/] - Rev 12

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Last modification

  • Rev 12 2009-11-26 11:05:27 GMT
  • Author: xianfeng
  • Log message:
    check-in SoC source
Path Last modification Log RSS feed
[FOLDER] or1k_soc_on_altera_embedded_dev_kit/ 12  5330d 00h xianfeng View Log RSS feed
[NODE][FOLDER] branches/ 1  5340d 05h root View Log RSS feed
[NODE][FOLDER] tags/ 8  5337d 04h xianfeng View Log RSS feed
[NODE][FOLDER] trunk/ 12  5330d 00h xianfeng View Log RSS feed
[NODE][NODE][FOLDER] docs/ 6  5338d 06h xianfeng View Log RSS feed
[NODE][NODE][FOLDER] linux-2.6/ 11  5330d 02h xianfeng View Log RSS feed
[NODE][NODE][FOLDER] soc/ 12  5330d 00h xianfeng View Log RSS feed
[NODE][NODE][NODE][FOLDER] bench/ 12  5330d 00h xianfeng View Log RSS feed
[NODE][NODE][NODE][FOLDER] doc/ 12  5330d 00h xianfeng View Log RSS feed
[NODE][NODE][NODE][FOLDER] prj/ 12  5330d 00h xianfeng View Log RSS feed
[NODE][NODE][NODE][FOLDER] rtl/ 12  5330d 00h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] adv_debug_sys/ 12  5330d 00h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] altera_ddr_ctrl/ 12  5330d 00h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] altera_pll/ 12  5330d 00h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] altera_ram/ 12  5330d 00h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] dbg_interface/ 12  5330d 00h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][FOLDER] rtl/ 12  5330d 00h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][FOLDER] verilog/ 12  5330d 00h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][NODE][FILE] dbg_cpu.v 12  5330d 00h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][NODE][FILE] dbg_cpu_defines.v 12  5330d 00h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][NODE][FILE] dbg_cpu_registers.v 12  5330d 00h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][NODE][FILE] dbg_crc32_d1.v 12  5330d 00h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][NODE][FILE] dbg_defines.v 12  5330d 00h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][NODE][FILE] dbg_register.v 12  5330d 00h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][NODE][FILE] dbg_top.v 12  5330d 00h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][NODE][FILE] dbg_wb.v 12  5330d 00h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][NODE][NODE][NODE][FILE] dbg_wb_defines.v 12  5330d 00h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] ethernet/ 12  5330d 00h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] flash_sram/ 12  5330d 00h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] gpio/ 12  5330d 00h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] mem_if/ 12  5330d 00h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] mmc_sd/ 12  5330d 00h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] or1200/ 12  5330d 00h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] rom_wb/ 12  5330d 00h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] spi/ 12  5330d 00h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] uart16550/ 12  5330d 00h xianfeng View Log RSS feed
[NODE][NODE][NODE][NODE][FOLDER] wb_conmax/ 12  5330d 00h xianfeng View Log RSS feed
[NODE][NODE][NODE][FOLDER] sim/ 12  5330d 00h xianfeng View Log RSS feed
[NODE][NODE][NODE][FOLDER] sw/ 12  5330d 00h xianfeng View Log RSS feed
[NODE][NODE][NODE][FOLDER] syn/ 12  5330d 00h xianfeng View Log RSS feed

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