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[/] [reed_solomon_decoder/] [trunk/] [document/] - Rev 2

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Last modification

  • Rev 2 2009-07-06 09:59:18 GMT
  • Author: aelmahmoudy
  • Log message:
    Initial commit of Reed Solomon Decoder Verilog core (204,188,8)
    corrects up to 8 errors per block
    Pipelined and verfied on FPGA
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[FOLDER] reed_solomon_decoder/ 2  5622d 22h aelmahmoudy View Log RSS feed
[NODE][FOLDER] branches/ 1  5622d 23h root View Log RSS feed
[NODE][FOLDER] tags/ 1  5622d 23h root View Log RSS feed
[NODE][FOLDER] trunk/ 2  5622d 22h aelmahmoudy View Log RSS feed
[NODE][NODE][FOLDER] document/ 2  5622d 22h aelmahmoudy View Log RSS feed
[NODE][NODE][NODE][FILE] Reed_Solomon_Decoder_204_188.pdf 2  5622d 22h aelmahmoudy View Log RSS feed
[NODE][NODE][FOLDER] rtl/ 2  5622d 22h aelmahmoudy View Log RSS feed
[NODE][NODE][FOLDER] simulation/ 2  5622d 22h aelmahmoudy View Log RSS feed

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