OpenCores
URL https://opencores.org/ocsvn/versatile_mem_ctrl/versatile_mem_ctrl/trunk

Subversion Repositories versatile_mem_ctrl

[/] [versatile_mem_ctrl/] [trunk/] [rtl/] [verilog/] - Rev 42

Rev

Go to most recent revision | Changes | View Log | RSS feed

Last modification

  • Rev 42 2010-03-22 22:44:19 GMT
  • Author: unneback
  • Log message:
    added pipeline stage for egress FIFO readot
Path Last modification Log RSS feed
[FOLDER] versatile_mem_ctrl/ 42  5216d 12h unneback View Log RSS feed
[NODE][FOLDER] branches/ 1  5493d 23h root View Log RSS feed
[NODE][FOLDER] tags/ 1  5493d 23h root View Log RSS feed
[NODE][FOLDER] trunk/ 42  5216d 12h unneback View Log RSS feed
[NODE][NODE][FOLDER] backend/ 8  5486d 19h unneback View Log RSS feed
[NODE][NODE][FOLDER] bench/ 35  5220d 20h unneback View Log RSS feed
[NODE][NODE][FOLDER] doc/ 36  5220d 13h unneback View Log RSS feed
[NODE][NODE][FOLDER] rtl/ 42  5216d 12h unneback View Log RSS feed
[NODE][NODE][NODE][FOLDER] verilog/ 42  5216d 12h unneback View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] burst_length_counter_defines.v 13  5353d 02h mikaeljf View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] cke_delay_counter_defines.v 11  5363d 14h mikaeljf View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] codec.v 34  5220d 20h unneback View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] copyright.v 2  5493d 23h unneback View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] ctrl_counter_defines.v 3  5488d 01h unneback View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] dcm_pll.v 21  5249d 18h mikaeljf View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] ddr_16.fzm 23  5243d 19h mikaeljf View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] ddr_16_defines.v 22  5245d 15h mikaeljf View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] ddr_ff.v 20  5251d 20h mikaeljf View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] delay.v 33  5220d 23h unneback View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] dff_sr.v 30  5225d 20h mikaeljf View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] fifo.v 5  5486d 19h unneback View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] fifo_adr_counter_defines.v 3  5488d 01h unneback View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] fifo_fill.fzm 5  5486d 19h unneback View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] fizzim.pl 16  5261d 21h mikaeljf View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] fsm_sdr_16.v 42  5216d 12h unneback View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] inc_adr.v 20  5251d 20h mikaeljf View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] latency_counter_defines.v 13  5353d 02h mikaeljf View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] Makefile 42  5216d 12h unneback View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] pre_delay_counter_defines.v 15  5262d 21h mikaeljf View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] ref_counter_defines.v 4  5487d 22h unneback View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] ref_delay_counter_defines.v 13  5353d 02h mikaeljf View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] sdr_16.fzm 11  5363d 14h mikaeljf View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] sdr_16.v 42  5216d 12h unneback View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] sdr_16_defines.v 33  5220d 23h unneback View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] versatile_counter.xls 39  5217d 14h unneback View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] versatile_mem_ctrl_ddr.v 41  5216d 20h mikaeljf View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] versatile_mem_ctrl_defines.v 41  5216d 20h mikaeljf View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] versatile_mem_ctrl_ip.v 35  5220d 20h unneback View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] versatile_mem_ctrl_top.v 42  5216d 12h unneback View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] versatile_mem_ctrl_wb.v 42  5216d 12h unneback View Log RSS feed
[NODE][NODE][FOLDER] sim/ 31  5225d 20h mikaeljf View Log RSS feed
[NODE][NODE][FOLDER] syn/ 30  5225d 20h mikaeljf View Log RSS feed
[NODE][FOLDER] web_uploads/ 1  5493d 23h root View Log RSS feed

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.