OpenCores
URL https://opencores.org/ocsvn/versatile_mem_ctrl/versatile_mem_ctrl/trunk

Subversion Repositories versatile_mem_ctrl

[/] [versatile_mem_ctrl/] [trunk/] [rtl/] [verilog/] - Rev 57

Rev

Go to most recent revision | Changes | View Log | RSS feed

Last modification

  • Rev 57 2010-03-30 06:04:36 GMT
  • Author: unneback
  • Log message:
    added support for early termination of burst access
Path Last modification Log RSS feed
[FOLDER] versatile_mem_ctrl/ 57  5251d 17h unneback View Log RSS feed
[NODE][FOLDER] branches/ 1  5536d 11h root View Log RSS feed
[NODE][FOLDER] tags/ 1  5536d 11h root View Log RSS feed
[NODE][FOLDER] trunk/ 57  5251d 17h unneback View Log RSS feed
[NODE][NODE][FOLDER] backend/ 8  5529d 06h unneback View Log RSS feed
[NODE][NODE][FOLDER] bench/ 35  5263d 08h unneback View Log RSS feed
[NODE][NODE][FOLDER] doc/ 43  5258d 16h unneback View Log RSS feed
[NODE][NODE][FOLDER] rtl/ 57  5251d 17h unneback View Log RSS feed
[NODE][NODE][NODE][FOLDER] verilog/ 57  5251d 17h unneback View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] burst_length_counter_defines.v 13  5395d 14h mikaeljf View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] cke_delay_counter_defines.v 11  5406d 02h mikaeljf View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] codec.v 34  5263d 08h unneback View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] copyright.v 2  5536d 11h unneback View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] ctrl_counter_defines.v 3  5530d 13h unneback View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] dcm_pll.v 21  5292d 06h mikaeljf View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] ddr_16.fzm 23  5286d 07h mikaeljf View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] ddr_16_defines.v 22  5288d 03h mikaeljf View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] ddr_ff.v 20  5294d 07h mikaeljf View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] delay.v 33  5263d 11h unneback View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] egress_fifo.v 45  5256d 11h unneback View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] fifo.v 5  5529d 07h unneback View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] fifo_adr_counter_defines.v 3  5530d 13h unneback View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] fifo_fill.fzm 5  5529d 07h unneback View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] fizzim.pl 16  5304d 08h mikaeljf View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] fsm_sdr_16.v 56  5253d 10h unneback View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] inc_adr.v 20  5294d 07h mikaeljf View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] latency_counter_defines.v 13  5395d 14h mikaeljf View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] Makefile 50  5256d 06h julius View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] pre_delay_counter_defines.v 15  5305d 08h mikaeljf View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] ref_counter_defines.v 4  5530d 10h unneback View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] ref_delay_counter_defines.v 13  5395d 14h mikaeljf View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] sdr_16.fzm 11  5406d 02h mikaeljf View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] sdr_16.v 57  5251d 17h unneback View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] sdr_16_defines.v 33  5263d 11h unneback View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] versatile_counter.xls 39  5260d 02h unneback View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] versatile_mem_ctrl_ddr.v 41  5259d 08h mikaeljf View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] versatile_mem_ctrl_defines.v 41  5259d 08h mikaeljf View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] versatile_mem_ctrl_ip.v 50  5256d 06h julius View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] versatile_mem_ctrl_top.v 55  5254d 04h julius View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] versatile_mem_ctrl_wb.v 57  5251d 17h unneback View Log RSS feed
[NODE][NODE][FOLDER] sim/ 31  5268d 08h mikaeljf View Log RSS feed
[NODE][NODE][FOLDER] syn/ 30  5268d 08h mikaeljf View Log RSS feed
[NODE][FOLDER] web_uploads/ 1  5536d 11h root View Log RSS feed

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.