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URL https://opencores.org/ocsvn/vhdl_wb_tb/vhdl_wb_tb/trunk

Subversion Repositories vhdl_wb_tb

[/] [vhdl_wb_tb/] [trunk/] [bench/] [vhdl/] - Rev 29

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Last modification

  • Rev 27 2019-09-21 15:20:11 GMT
  • Author: sinx
  • Log message:
    added the missing wishbone_unused_address_c to my_project_pkg.vhd
    fixed the readdata_v error and added the missing "end if;" in wishbone_bfm_pkg.vhd
    fixed a range error in convert_pkg.vhd
    minor changes to vhdl_wb_tb_Usage_guide.docx
Path Last modification Log RSS feed
[FOLDER] vhdl_wb_tb/ 29  1300d 03h sinx View Log RSS feed
[NODE][FOLDER] branches/ 1  2306d 12h root View Log RSS feed
[NODE][FOLDER] tags/ 29  1300d 03h sinx View Log RSS feed
[NODE][FOLDER] trunk/ 27  1875d 18h sinx View Log RSS feed
[NODE][NODE][FOLDER] bench/ 27  1875d 18h sinx View Log RSS feed
[NODE][NODE][NODE][FOLDER] vhdl/ 27  1875d 18h sinx View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] stimulator.vhd 15  2301d 18h sinx View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] tb_pkg.vhd 14  2301d 19h sinx View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] tb_top.vhd 18  2291d 23h sinx View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] tc_top.vhd 14  2301d 19h sinx View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] tc_xxxx.vhd 19  2291d 23h sinx View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] verifier.vhd 15  2301d 18h sinx View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] wishbone_bfm_pkg.vhd 27  1875d 18h sinx View Log RSS feed
[NODE][NODE][FOLDER] doc/ 27  1875d 18h sinx View Log RSS feed
[NODE][NODE][FOLDER] rtl/ 27  1875d 18h sinx View Log RSS feed
[NODE][NODE][FOLDER] rtl_sim/ 27  1875d 18h sinx View Log RSS feed

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