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[/] [zipcpu/] [trunk/] - Rev 118

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  • Rev 118 2016-04-02 23:29:56 GMT
  • Author: dgisselq
  • Log message:
    Fixes two bugs: 1) in the early branching code within the instruction decoder.
    This prevented the early branching from working when built with Xilinx's tools,
    while the code worked with Verilator. 2) The CPU was not working with the
    traditional cache and early branching disabled. These two bugs masked each
    other. The replacement code is simpler.
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[FOLDER] zipcpu/ 118  3164d 10h dgisselq View Log RSS feed
[NODE][FOLDER] branches/ 1  3415d 17h root View Log RSS feed
[NODE][FOLDER] tags/ 1  3415d 17h root View Log RSS feed
[NODE][FOLDER] trunk/ 118  3164d 10h dgisselq View Log RSS feed
[NODE][NODE][FOLDER] bench/ 105  3188d 18h dgisselq View Log RSS feed
[NODE][NODE][FOLDER] doc/ 107  3183d 11h dgisselq View Log RSS feed
[NODE][NODE][FOLDER] rtl/ 118  3164d 10h dgisselq View Log RSS feed
[NODE][NODE][FOLDER] sw/ 117  3164d 17h dgisselq View Log RSS feed
[NODE][NODE][FILE] Makefile 108  3182d 20h dgisselq View Log RSS feed
[NODE][NODE][FILE] zip.vim 69  3266d 17h dgisselq View Log RSS feed

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