Subversion Repositories zipcpu

Last modification

• Rev 71 2015-12-28 20:34:13 GMT
• Author: dgisselq

• Log message:

  This contains a bunch of bug fixes. (A lot ...) For example, the pipeline
  stall code has also seriously changed, to fixed the pipeline memory load/op
  stage conflict, while maintaining no-stall operation for operands that don't
  need an offset. This had a cascading effect, however, so that the multiply
  could no longer complete in a single cycle. Therefore, the timing on the
  multiplies was slowed down to two cycles from a single cycle. (It's the
  only two-cycle ALU operation ...) The illegal instruction code has also been
  fixed, so that illegal instructions no longer stalls the prefetch bus.